Execution unit accelerator
US10929134B2 · kind B2 · utility
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1References
16Claims
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Assignee
Inventors
Key dates
| Filing date | Jun 28, 2019 |
| Grant date | Feb 23, 2021 |
| Priority date | — |
| Expiry date | Jun 28, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T1/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor to facilitate acceleration of instruction execution is disclosed. The processor includes a plurality of execution units (EUs), each including an instruction decode unit to decode an instruction into one or more operands and opcode defining an operation to be performed at an accelerator, a register file having a plurality of registers to store the one or more operands and an accelerator having programmable hardware to retrieve the one or more operands from the register file and perform the operation on the one or more operands.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.