Distributed error and anomaly communication architecture for analog and mixed-signal systems
US10929337B2 · kind B2 · utility
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Key dates
| Filing date | May 24, 2019 |
| Grant date | Feb 23, 2021 |
| Priority date | — |
| Expiry date | May 24, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3452
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, systems and apparatuses may provide for technology that detects, by a first monitor in a first domain of a system, a presence of a first anomaly in the first domain and encodes, by the first monitor, the presence of the first anomaly and a weight of the first anomaly into a multi-level data structure. In one example, the technology also sends, by the first monitor, the multi-level data structure to a second monitor in a second domain of the system, wherein the second domain is located at a different hierarchical level in the system than the first domain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.