Shift register, driving method thereof, gate driving circuit, and display device
US10930360B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jan 8, 2019 |
| Grant date | Feb 23, 2021 |
| Priority date | — |
| Expiry date | Feb 6, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift register includes a first input sub-circuit configured to transfer a first input signal at a first input terminal to a first node in response to a first scan signal at a first scan terminal being active, a first level control sub-circuit configured to transfer a first power supply voltage at a first power supply terminal to a first output control node and a second output control node in response to the first node being at an active potential, and an output sub-circuit configured to transfer a first clock signal at a first clock terminal to a first output in response to the first output control node being at an active potential, and to transfer a second clock signal at a second clock terminal to a second output terminal in response to the second output control node being at an active potential.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.