Semiconductor device and manufacturing method thereof
US10930599B2 · kind B2 · utility
2Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2018 |
| Grant date | Feb 23, 2021 |
| Priority date | — |
| Expiry date | Jan 10, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/143
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor device comprises forming an integrated circuit, surrounding the integrated circuit with an inner seal ring, and surrounding the inner seal ring with a closed-loop outer seal ring. The inner seal ring includes a plurality of metal layers in a stacked configuration, first and second seal portions separated from each other, and third and fourth seal portions spaced apart from the first and second seal portions and separated from each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.