Offset gate metal oxide switching transistor device for use in medical device applications
US10930642B2 · kind B2 · utility
0Cited by
1References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 23, 2019 |
| Grant date | Feb 23, 2021 |
| Priority date | — |
| Expiry date | Aug 23, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/80377
Abstract
An image sensor array includes pixels arranged in rows and columns, wherein each pixel includes a transistor serially coupled to a photodiode, data lines coupled to a first node of the pixel, bias lines coupled to a second node of the pixel, gate lines coupled to a third node of the pixel, and electrostatic-discharge (ESD) circuits coupled between the gate lines and an ESD bus, wherein the ESD circuits each include first and second metal oxide offset bottom gate transistors in parallel connection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.