System, apparatus and method for bulk register accesses in a processor
US10936048B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2019 |
| Grant date | Mar 2, 2021 |
| Priority date | — |
| Expiry date | Jul 16, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/7807
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, an apparatus includes a bulk write circuit to generate a bulk write message to send to a destination agent to cause the destination agent to write data comprising register contents into a plurality of registers, at least some of the plurality of registers comprising non-consecutive registers. The bulk write message may include a first message header, a first chunk header including an address of a first register of a first subset of the plurality of registers, and a first payload portion having the register contents for the first subset of the plurality of registers. Other embodiments are described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.