System and method to reduce address range scrub execution time in non-volatile dual inline memory modules
US10936407B2 · kind B2 · utility
1Cited by
7References
20Claims
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Key dates
| Filing date | May 30, 2019 |
| Grant date | Mar 2, 2021 |
| Priority date | — |
| Expiry date | Jul 18, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/4402
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile dual in-line memory module (NVDIMM) instantiates first and second partitions of non-volatile memory. The first partition is reserved and is not accessible to an operating system instantiated. The second partition is accessible to the operating system. A processor detects a first bad memory location in the second partition, stores a first system physical address of the first bad memory location to a system bad memory locations list, and stores a first DIMM physical address of the first bad memory location to a first NVDIMM bad memory locations list in the first partition.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.