Devices, systems, and methods for integrated circuit verification
US10937203B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 11, 2019 |
| Grant date | Mar 2, 2021 |
| Priority date | — |
| Expiry date | Dec 11, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/3308
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method includes storing first macros that define colors of text generated during a simulation of a design under test (DUT) of an integrated circuit (IC). The method includes mapping second macros to the first macros based on a plurality of colors, where each of the plurality of colors is associated with one of a plurality of report messages generated by executing the second macros. The method includes conducting the simulation of the DUT, and displaying, based on the conducted simulation, the plurality of report messages in a format where each of the plurality of report messages is displayed in a color associated with the report message.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.