Post-tessellation blending in a GPU pipeline
US10937228B2 · kind B2 · utility
3Cited by
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20Claims
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Key dates
| Filing date | Apr 5, 2019 |
| Grant date | Mar 2, 2021 |
| Priority date | — |
| Expiry date | Apr 24, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2200/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Implementations of blender hardware perform both domain shading and blending and whilst some vertices may not require blending, all vertices require domain shading. The blender hardware includes a cache and/or a content addressable memory and these data structures are used to reduce duplicate domain shading operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.