Non-volatile memory device and storage device including the same
US10937471B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 20, 2020 |
| Grant date | Mar 2, 2021 |
| Priority date | — |
| Expiry date | Jul 20, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/107
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory device includes a serial pipeline structure connected to an output stage of a First In, First Out (FIFO) memory. The FIFO memory is configured to store data transmitted through a data path having a wave pipeline structure based on a plurality of FIFO input clock signals and output the stored data based on a plurality of FIFO output clock signals. A serializer is configured to output data to an input/output pad based on a select clock signal. The serial pipeline structure is connected between the FIFO memory and the serializer and configured to compensate for a phase difference between the data output from the FIFO memory and the select clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.