Integrated circuit comprising macros and method of fabricating the same

US10937778B2 · kind B2 · utility

Assignee

• COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES · FR

Inventors

• Hughes Metras · Grenoble, FR
• Fabien Clermidy · Fontenay-le-Fleury, FR
• Didier Lattard · Rencurel, FR
• Sébastien Thuries · Grenoble, FR
• Pascal Vivet · Le Pont-de-Claix, FR

Key dates

• Filing date: Jun 17, 2019
• Grant date: Mar 2, 2021
• Expiry date: Jun 17, 2039

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/35121
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A tier of a 3D circuit comprising: one or more macro circuits, each macro circuit comprising a plurality of macro cells arranged in an array, the macro cells being separated from each other by spaces; and interconnection vias positioned in the spaces between the macro cells.