Methods and apparatus for online timing mismatch calibration for polar and segmented power amplifiers
US10938352B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 2019 |
| Grant date | Mar 2, 2021 |
| Priority date | — |
| Expiry date | Oct 30, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2001/0408
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus and methods for timing mismatch in a power amplifier includes a segmented PA with two-path timing mismatch calibration to improve ACLR performance over different signal transitions, process, voltage and temperature (PVT) variations and device aging; a fast and efficient algorithm for measuring and calibrating the delay of two paths (signal path and control path); a signal magnitude variation detection circuit, such as flash ADC, with improved comparator's performance for RF signal processing and minimum delay. A method for choosing the threshold voltage of the magnitude variation detection circuit, according to status of the signals and orthogonal frequency-division multiplexing (OFDM) related standards; other critical blocks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.