Broadband digitizer with a low frequency bypass
US10938400B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 20, 2020 |
| Grant date | Mar 2, 2021 |
| Priority date | — |
| Expiry date | Jul 20, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/10
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A broadband digitizer for an applied broadband analog input signal SA(t). The digitizer includes a low frequency analog-to-digital converter (LF ADC) channel and a high frequency analog-to-digital converter (HF ADC) channel, an input splitter coupled to respective inputs to the LF ADC channel HF ADC channels, a frequency divider, and a combining unit. Low frequency portions of SA(t) are digitized to digital signal SDLF[n] in the LF ADC channel and high frequency portions of SA(t) are digitized to digital signal SDHF[n] in the HF ADC channel. The combining unit combines the digital signals SDLF[n] and SDHF[n] to form distortion-reduced SD[n], corresponding to SA(t). Front ends of the LF ADC channel and HF ADC channel reduce level-caused distortions, and the combining unit reduces ADC frequency-caused, time-position-caused, and interpolation-caused distortions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.