Bit-line mux driver with diode header for computer memory
US10943647B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2019 |
| Grant date | Mar 9, 2021 |
| Priority date | — |
| Expiry date | Sep 30, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method includes receiving, at a bitline-mux driver circuit, a subarray activation (SUBA) signal and a delay signal. The bitline-mux driver circuit includes a header circuit operable to output a driver voltage to a plurality of driver circuits. The driver voltage is boosted through a voltage divider with diode header circuit based on the SUBA signal to set the driver voltage to a value above a standard supply voltage (VDD) and between a voltage bitline high (VBLH) level and a high voltage (VPP) level. The VPP level exceeds a maximum allowed voltage (VMAX) level of the driver circuits. A master wordline output of the driver circuits is driven to select a bitline mux of a computer memory module based on an address input signal, the delay signal, and the driver voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.