Patent · US Active

Thin-film transistor, array substrate, display panel and display device and fabrication method thereof

US10943926B2 · kind B2 · utility

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Key dates

Filing dateFeb 9, 2017
Grant dateMar 9, 2021
Priority date
Expiry dateFeb 9, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D86/421

Abstract

The present disclosure relates to a thin-film transistor, an array substrate, a display panel and a display device and fabrication methods thereof. The thin-film transistor includes a gate insulation layer, an active layer having a source region, a drain region, and a channel region, a first doping layer on the source region, a second doping layer on the drain region, and at least one third doping layer arranged between the first doping layer and the second doping layer, wherein the first, the second, and the third doping layers have same conductivity type, and wherein the third doping layer is positioned in the channel region and contacts the gate insulation layer, and the third doping layer does not contact the first doping layer and the second doping layer simultaneously, or the third doping layer is positioned on the channel region and only contacts the first or the second doping layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.