Display panel having a crack barrier layer and display apparatus thereof
US10944073B2 · kind B2 · utility
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16Claims
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Key dates
| Filing date | Dec 5, 2017 |
| Grant date | Mar 9, 2021 |
| Priority date | — |
| Expiry date | Jan 14, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/173
Abstract
The present application discloses a display panel having a display area and a peripheral area. The display panel includes a base substrate; a display unit on the base substrate; an encapsulating layer on a side of the display unit distal to the base substrate and encapsulating the display unit; and a first crack barrier layer on the base substrate and in the peripheral area and forming a first enclosure substantially surrounding a first area. The encapsulating layer includes a first inorganic sub-layer. The first inorganic sub-layer includes a first part enclosed inside the first area by the first crack barrier layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.