Radar level indicator having a short measurement time
US10948333B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 8, 2018 |
| Grant date | Mar 16, 2021 |
| Priority date | — |
| Expiry date | Nov 23, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01F23/804
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A radar level indicator comprising a processor, an analogue-digital converter circuit and an intermediate memory connected therebetween. The intermediate memory is configured to receive digital signals from the analogue-digital converter circuit at a first data rate. The processor is configured to read out the intermediate memory at a second data rate that is different from the first data rate. It is thus possible to reduce the transmission time while maintaining the same energy requirement.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.