Flash memory polling
US10949115B2 · kind B2 · utility
1Cited by
4References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2019 |
| Grant date | Mar 16, 2021 |
| Priority date | — |
| Expiry date | Jun 24, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0679
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A Data Storage Device (DSD) includes a flash memory for storing data. Portions of the flash memory are grouped into logical groups based on at least one of a number of Program/Erase (P/E) cycles and a physical level location of the portions of the flash memory. A command performance latency is monitored for each logical group, and at least one polling time for each respective logical is set based on the monitored command performance latency for the logical group. The at least one polling time indicates a time to wait before checking whether a portion of the flash memory in the logical group has completed a command.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.