Handling memory errors in memory modules that include volatile and non-volatile components
US10949286B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 12, 2015 |
| Grant date | Mar 16, 2021 |
| Priority date | — |
| Expiry date | Nov 30, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1417
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one example in accordance with the present disclosure, a system for handling memory errors includes a memory module having volatile components and non-volatile components. The system includes a BIOS chip having BIOS code and a BIOS non-volatile (NV) memory. The BIOS NV memory stores error data associated with the memory module that was stored prior to a power-on or reset of the system. The system includes a processor to execute the BIOS code to, after the power-on or reset of the system end before an operating system is loaded; (1) read, from the BIOS NV memory, the error data; and (2) determine, based on the error data, whether to take a corrective action with respect to the memory module.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.