Fast page fault handling process implemented on persistent memory
US10949356B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Jun 14, 2019 |
| Grant date | Mar 16, 2021 |
| Priority date | — |
| Expiry date | Jun 14, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1021
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method is described. The method includes receiving notice of a page fault. A page targeted by a memory access instruction that resulted in the page fault residing in persistent memory without system memory status. In response to the page fault, updating page table information to include a translation that points to the page in persistent memory such that the page changes to system memory status without moving the page and system memory expands to include the page in persistent memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.