System and method for cryogenic hybrid technology computing and memory
US10950299B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 28, 2019 |
| Grant date | Mar 16, 2021 |
| Priority date | — |
| Expiry date | Oct 28, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N69/00
- WIPO fieldPharmaceuticals
- WIPO sectorChemistry
Abstract
A system and method for high-speed, low-power cryogenic computing are presented, comprising ultrafast energy-efficient RSFQ superconducting computing circuits, and hybrid magnetic/superconducting memory arrays and interface circuits, operating together in the same cryogenic environment. An arithmetic logic unit and register file with an ultrafast asynchronous wave-pipelined datapath is also provided. The superconducting circuits may comprise inductive elements fabricated using both a high-inductance layer and a low-inductance layer. The memory cells may comprise superconducting tunnel junctions that incorporate magnetic layers. Alternatively, the memory cells may comprise superconducting spin transfer magnetic devices (such as orthogonal spin transfer and spin-Hall effect devices). Together, these technologies may enable the production of an advanced superconducting computer that operates at clock speeds up to 100 GHz.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.