Multimode cryptographic processor
US10951393B2 · kind B2 · utility
8Cited by
1References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 11, 2018 |
| Grant date | Mar 16, 2021 |
| Priority date | — |
| Expiry date | Apr 12, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/125
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
This disclosure describes techniques that include performing cryptographic operations (encryption, decryption, generation of a message authentication code). Such techniques may involve the data processing unit performing any of multiple modes of encryption, decryption, and/or other cryptographic operation procedures or standards, including, Advanced Encryption Standard (AES) cryptographic operations. In some examples, the security block is implemented as a unified, multi-threaded, high-throughput encryption and decryption system for performing multiple modes of AES operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.