Via impedance matching
US10952313B1 · kind B1 · utility
1Cited by
1References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 22, 2020 |
| Grant date | Mar 16, 2021 |
| Priority date | — |
| Expiry date | Jan 22, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/09836
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An electronic circuit includes a first conductor configured horizontally on a first layer and a second conductor configured horizontally on a second layer. The second conductor is separated from the first conductor by a plurality of layers. A third conductor is configured between the first layer and the second layer. The third conductor electrically couples the first conductor and the second conductor. One or more intermediate conductors are electrically coupled to the third conductor, with the one or more intermediate conductors configured on one or more intermediate layers between the first layer and the second layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.