Method and apparatus for bond wire testing in an integrated circuit
US10955465B2 · kind B2 · utility
1Cited by
7References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 14, 2018 |
| Grant date | Mar 23, 2021 |
| Priority date | — |
| Expiry date | Feb 1, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30105
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Disclosed herein are testing apparatus and methods to identify latent defects in IC devices based on capacitive coupling between bond wires. Bond wires may have latent defects that do not appear as hard shorts or hard opens at the time of testing, but may pose a high risk of developing into hard shorts or hard opens over time. A latent defect may form when two adjacent bond wires are disturbed to become close to each other. According to some embodiments, capacitive coupling between a pair of pins may be used to provide an indication of a near-short latent defect between bond wires connected to the pair of pins.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.