Semiconductor apparatus and module
US10957689B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 31, 2018 |
| Grant date | Mar 23, 2021 |
| Priority date | — |
| Expiry date | Jan 31, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/813
Abstract
Provided is a semiconductor apparatus capable of enhancing the withstand voltage while suppressing the enlargement of the chip area. Provided is semiconductor apparatus including: a first terminal to which a high frequency signal is supplied; a second terminal from which the high frequency signal is output; first, second and third switch elements electrically connected in series between the first terminal and the second terminal; a first capacitor provided between the first terminal and a first node between the first switch element and the second switch element; and a second capacitor provided between the first terminal and a second node between the second switch element and the third switch element, in which the capacitance of the first capacitor is greater than the capacitance of the second capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.