Clock period randomization for defense against cryptographic attacks
US10958414B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 17, 2017 |
| Grant date | Mar 23, 2021 |
| Priority date | — |
| Expiry date | Nov 16, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/12
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Methods, systems, and apparatuses for defending against cryptographic attacks using clock period randomization. The methods, systems, and apparatuses are designed to make side channel attacks and fault injection attacks more difficult by using a clock with a variable period during a cryptographic operation. In an example embodiment, a clock period randomizer includes a fixed delay generator and a variable delay generator, wherein a variable delay generated by the variable delay generator is based on a random or pseudorandom value that is changed occasionally or periodically. The methods, systems, and apparatuses are useful in hardware security applications where fault injection and/or side channel attacks are of concern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.