Accelerating dataflow signal processing applications across heterogeneous CPU/GPU systems
US10963300B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 2, 2019 |
| Grant date | Mar 30, 2021 |
| Priority date | — |
| Expiry date | Jul 10, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/509
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method includes: forming a virtual tile cluster having tiles, wherein a tile comprises a processor and memory from a CPU device and a GPU device, and a tile in the GPU device further comprises subprocessors; forming a virtual unified memory that is accessible by the CPU and GPU devices; receiving a task; assigning the task to a tile of the virtual tile cluster according to a pre-defined rule. When the task is assigned to a tile in the GPU device, the method further performs: broadcasting the task to the subprocessors of a tile using a GPU shuffle instruction; and dividing data for the task and assigning the divided data to the subprocessors, wherein each subprocessor runs a codelet using the each of divided data. The task is executed by the at least one tile of the virtual tile cluster.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.