Patent · US Active

Semiconductor storage device

US10964377B2 · kind B2 · utility

5Cited by
4References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 2, 2020
Grant dateMar 30, 2021
Priority date
Expiry dateMar 2, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10B43/27
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A semiconductor storage device includes first, second, and third transistors, first, second, and third bit lines connected to the first, second, and third transistors, a word line connected to the first, second, and third transistors, and a control circuit configured to perform a program operation for writing data to the second and third transistors, including raising a first voltage applied to the first bit line at a first timing, raising a second voltage applied to the word line at a second timing, raising a third voltage applied to the second bit line at a third timing, raising a fourth voltage applied to the third bit line at a fourth timing, and lowering the first voltage at a fifth timing. The first voltage is raised to a first predetermined voltage, and each of the third and fourth voltages is raised to a second predetermined voltage smaller than the first predetermined voltage.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.