Initialisation of a storage device
US10964386B2 · kind B2 · utility
0Cited by
5References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2018 |
| Grant date | Mar 30, 2021 |
| Priority date | — |
| Expiry date | Mar 26, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/32
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
There is provided a system comprising: a storage device having a storage portion comprising a plurality of bitcells coupled to respective first signal lines and second signal lines and control logic to alter a memory state of the plurality of bitcells via the first signal lines and second signal lines; a memory controller coupled to the storage device to transmit one or more initialisation signals to the storage device; wherein the storage device is to initialise the storage portion over a clock cycle in response to the one or more initialisation signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.