Patent · US Active

Integrated circuits with current limit clamps and skip clamps for power converters

US10965216B2 · kind B2 · utility

1Cited by

0References

18Claims

0Family size

Assignee

TEXAS INSTRUMENTS INCORPORATED · US

Inventors

Gerhard Thiele · Dachau, DE
Manuel Wiersch · Freising, DE

Key dates

Filing date	Sep 25, 2018
Grant date	Mar 30, 2021
Priority date	—
Expiry date	Sep 25, 2038

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02B70/10
WIPO fieldElectrical machinery, apparatus, energy
WIPO sectorElectrical engineering

Abstract

An integrated circuit comprising: a high-side pMOSFET comprising a drain and a gate; a node coupled to the drain of the high-side pMOSFET; a voltage-to-current circuit comprising a first nMOSFET and a first resistor, the first nMOSFET comprising a gate and a source, the first resistor comprising a terminal coupled to the source of the first nMOSFET; an error amplifier comprising an output port coupled to the gate of the first nMOSFET; a skip clamp nMOSFET comprising a source coupled to the output port of the error amplifier; and a current limit clamp pMOSFET comprising a source coupled to the output port of the error amplifier.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.