Ramp generator for multilevel class-D amplifiers
US10965279B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 21, 2019 |
| Grant date | Mar 30, 2021 |
| Priority date | — |
| Expiry date | Mar 26, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/372
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A multi-level ramp generator comprises three ramp generators. The first ramp generator generates a first ramp signal, comprising a sawtooth voltage waveform with a first common mode voltage and a first peak to peak voltage. The second ramp generator generates a second ramp signal, comprising a sawtooth voltage waveform with a second common mode voltage and a second peak-to-peak voltage. The third ramp generator generates a third ramp signal, comprising a sawtooth voltage waveform with a third common mode voltage and the second peak-to-peak voltage. The second and third ramp signals are in phase with each other and the first ramp signal is 180° out of phase with the second and third ramp signals. In some implementations, each of the first, second, and third ramp generators comprise a respective delay locked loop and a respective voltage controlled oscillator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.