Enforcing unique page table permissions with shared page tables
US10969980B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 2019 |
| Grant date | Apr 6, 2021 |
| Priority date | — |
| Expiry date | Jun 20, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1081
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor includes a processing core; a filter register to store a first permissions filter; and a memory management unit (MMU), coupled to the processing core, the filter register and a first peripheral device associated with the first permissions filter, wherein the MMU comprises a logic circuit to manage a shared page table comprising entries corresponding to the processing core and the first peripheral device, wherein the logic circuit is to; receive a memory access request for a first page of memory from the first peripheral device; determine whether the set of permission bits of the first entry match a first combination of bits of the first permissions filter; grant the memory access request if the set of permission bits match the first combination of bits of the first permissions filter; and cause a page fault if the set of permission bits do not matching the first combination of bits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.