Neuromorphic computing architecture with dynamically accessible contexts
US10970630B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 15, 2017 |
| Grant date | Apr 6, 2021 |
| Priority date | — |
| Expiry date | Aug 16, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/082
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Various technologies pertaining to allocating computing resources of a neuromorphic computing system are described herein. Subgraphs of a neural algorithm graph to be executed by the neuromorphic computing system are identified. The subgraphs are each executed by a group of neuron circuits serially. Output data generated by execution of the subgraphs are provided to the same or a second group of neuron circuits at a same time or with associated timing data indicative of a time at which the output data was generated. The same or second group of neuron circuits performs one or more processing operations based upon the output data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.