Semiconductor package
US10971454B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 24, 2019 |
| Grant date | Apr 6, 2021 |
| Priority date | — |
| Expiry date | Jul 30, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K1/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes: a core structure having first and second surfaces and having first and second through-holes; a first semiconductor chip embedded in the core structure and having first and second contacts disposed on two opposing surfaces thereof, respectively; a first wiring layer on the surface of the core structure and connected to the first contact; a second wiring layer on the second surface of the core structure and connected to the second contact; a chip antenna disposed in the first through-hole; a second semiconductor chip in the second through-hole and having a connection pad; a first redistribution layer on the first surface of the core structure and connected to the connection terminal, the connection pad, and the first wiring layer; an encapsulant encapsulating the chip antenna and the second semiconductor chip; and a second redistribution layer on the encapsulant connecting to the second wiring layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.