Compact protection device for protecting an integrated circuit against electrostatic discharge
US10971489B2 · kind B2 · utility
0Cited by
4References
17Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 8, 2019 |
| Grant date | Apr 6, 2021 |
| Priority date | — |
| Expiry date | May 8, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/47
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An integrated circuit includes a power supply terminal, a reference terminal, and a signal terminal. A first protection device is coupled between the signal terminal and the power supply terminal, the first protection device including a first MOS transistor. A second protection device is coupled between the signal terminal and the reference terminal, the second protection device including a second MOS transistor. Gates of the MOS transistors are directly or indirectly coupled to the reference terminal. Substrates of the MOS transistors are coupled to the reference terminal via a common resistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.