Method of forming a semiconductor device
US10971542B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 9, 2019 |
| Grant date | Apr 6, 2021 |
| Priority date | — |
| Expiry date | Sep 9, 2039 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/4913
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods including bonding two or more separately formed circuit layers are provided using, for example, cold welding techniques. Processing techniques may be provided for combining inorganic and/or organic semiconductor devices in apparatus including, for example, microchips, optoelectronic devices, such as solar cells, photodetectors and organic light emitting diodes (OLEDs), and other apparatus with multi-layer circuitry. Methods of bonding preformed circuit layers may include the use of stamping and pressure bonding contacts of two or more circuit layers together. Such methods may find applicability, for example, in bonding circuitry to shaped substrates, including various rounded and irregular shapes, and may be used to combine devices with different structural properties, e.g. from different materials systems.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.