Patent · US Active

Confidential verification of FPGA code

US10972277B2 · kind B2 · utility

0Cited by
0References
29Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 15, 2017
Grant dateApr 6, 2021
Priority date
Expiry dateFeb 16, 2038

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04W4/60
  • WIPO fieldDigital communication
  • WIPO sectorElectrical engineering

Abstract

The present disclosure provides confidential verification for FPGA code. Confidential verification for FPGA code can include receiving the policy from a cloud service provider (CSP) computing device, wherein the policy comprises a plurality of policy requirements used to determine whether to configure the FPGA using the code, receiving the code and the code encryption key from the user computing device, determining whether the code fulfills the plurality of policy requirements, and when the code fulfills the plurality of policy requirements encrypting and integrity protect the code using the code encryption key and providing the encrypted and integrity protected code to an accelerator loader to configure the FPGA using the code.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.