Patent · US Active

Non-volatile memory persistence method and computing device

US10976956B2 · kind B2 · utility

1Cited by
3References
12Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 27, 2019
Grant dateApr 13, 2021
Priority date
Expiry dateMar 27, 2039

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F3/0619
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

In a non-volatile memory (NVM) persistence method, a memory controller maintains a plurality of memory write instruction sets that are locked separately for persistence of write operations. A credit value for monitoring a quantity of completed write instructions is configured for each of the plurality of memory write instruction sets, and a credit value is also configured for each of a plurality of medium write instruction sets maintained by a medium controller and corresponding respectively to the memory write instruction sets. After a memory write instruction set is locked in response to a persistence query, the credit value of a corresponding medium write instruction set is used as means for the memory controller to determine whether the write instructions in the locked memory write instruction set have been completed by the medium controller.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.