Main memory control function with prefetch intelligence
US10977036B2 · kind B2 · utility
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25Claims
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Key dates
| Filing date | Sep 30, 2016 |
| Grant date | Apr 13, 2021 |
| Priority date | — |
| Expiry date | Sep 30, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/6028
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus is described. The apparatus includes main memory control logic circuitry comprising prefetch intelligence logic circuitry. The prefetch intelligence circuitry to determine, from a read result of a load instruction, an address for a dependent load that is dependent on the read result and direct a read request for the dependent load to a main memory to fetch the dependent load's data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.