Systems and methods for forming finFET analog designs having a modular memory-like layout

US10978592B1 · kind B1 · utility

Assignee

• MARVELL ASIA PTE LTD · SG

Inventors

• Hui Wang · Beijing, CN
• Runzi Chang · San Jose, US

Key dates

• Filing date: Jan 13, 2020
• Grant date: Apr 13, 2021
• Expiry date: Jan 13, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/834

Abstract

A method of forming a finFET includes providing a semiconductor substrate having at least one fin feature extending through a diffusion layer formed on the semiconductor substrate, forming a gate layer on the diffusion layer and the fin feature, splitting the gate layer into a split gate structure including a first gate region, a second gate region, and a gap separating the first gate region and the second gate region, doping the gate layer, doping the diffusion layer to form a plurality of source/drain regions that includes a source/drain region in the gap between the first gate region and the second gate region, and injecting dopants into the diffusion layer to form a diffusion region having a plurality of pocket dopant regions. The plurality of pocket dopant regions includes at least one pocket dopant region in the gap between the first gate region and the second gate region.