Transistor ringing adjustment circuit and method
US10979045B2 · kind B2 · utility
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23Claims
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Key dates
| Filing date | Nov 30, 2018 |
| Grant date | Apr 13, 2021 |
| Priority date | — |
| Expiry date | Nov 30, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0185
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A transistor, e.g., field effect transistor FET, ringing adjustment circuit and method comprising the measuring of a voltage from a transistor (e.g., a node of a FET) during the transistor turning on and turning off, determining the voltage oscillation in the measured voltage by performing a derivative function on the measured voltage and detecting a switch in a voltage change rate from positive to negative or negative to positive, and comparing the voltage change rate after the detected switch to adjust drive current applied to the transistor to optimize efficiency while minimizing voltage oscillation and ringing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.