Semiconductor chip, semiconductor wafer and method for manufacturing semiconductor wafer
US10985050B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 4, 2017 |
| Grant date | Apr 20, 2021 |
| Priority date | — |
| Expiry date | Aug 4, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to the technical field of semiconductors, and in particular to a semiconductor chip, a semiconductor wafer and a method for manufacturing a semiconductor wafer. The semiconductor chip comprises: a substrate, devices provided on a side of the substrate, via holes running through the substrate, conductive material filled in the via holes and contacted with the devices, and a backside metal layer provided on the other side of the substrate away from the devices, the backside metal layer coming into contact with the conductive material so as to be electrically connected to the devices via the conductive material. The semiconductor chip, the semiconductor wafer and the method for manufacturing a semiconductor wafer of the present disclosure reduce the ground resistance and improve the heat dissipation of devices with via holes structure during the operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.