System and method for temporal signal measurement of device under test (DUT) and method of forming system
US10989758B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 19, 2019 |
| Grant date | Apr 27, 2021 |
| Priority date | — |
| Expiry date | Nov 12, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/197
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A measurement system of a device under test (DUT) includes a reference clock synthesizer configured to generate a master reference clock signal, a transmitter unit connected to the reference clock synthesizer and configured to connect to the DUT, and a measurement control system connected to the transmitter unit and configured to control the transmitter unit to generate a test signal pattern based on a first reference clock signal derived from the master reference clock signal, and generate a signal for passing through the DUT based on the test signal pattern. A receiver unit connected to the reference clock synthesizer is configured to connect to the DUT and to detect the signal and generate a digital signal based on the signal and a second reference clock signal derived from the master reference clock signal. The measurement control system is configured to provide an output signal based on the digital signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.