Reducing computations for data including padding
US10990650B1 · kind B1 · utility
22Cited by
1References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 22, 2018 |
| Grant date | Apr 27, 2021 |
| Priority date | — |
| Expiry date | Mar 28, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods are provided to eliminate multiplication operations with zero padding data for convolution computations. A multiplication matrix is generated from an input feature map matrix with padding by adjusting coordinates and dimensions of the input feature map matrix to exclude padding data. The multiplication matrix is used to perform matrix multiplications with respective weight values which results in fewer computations as compared to matrix multiplications which include the zero padding data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.