Just-in-time hardware for field programmable gate arrays
US10990730B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 9, 2018 |
| Grant date | Apr 27, 2021 |
| Priority date | — |
| Expiry date | Jul 19, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/45508
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for implementing a distributed hardware system includes retrieving a hardware design described in a hardware description language, where the hardware design includes a plurality of modules. The method includes sending modules of the design to software engines, where the runtime software maintains for each module being simulated an update queue and evaluate queue. The update queue contains events that update stateful objects in the module and cause evaluation events to be enqueued onto the evaluate queue, while the evaluate queue contains evaluate events that update stateless objects and cause update events to be enqueued onto the update queue. Having a update and evaluate queues for each module permits the runtime to manage module simulations so that the executions of each module run concurrently with each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.