System frequency margin recovery via distributed critical path monitors (CPM)

US10990732B1 · kind B1 · utility

Assignee

• NVIDIA Corporation · US

Inventors

• Tezaswi Raja · Santa Clara, US
• Siddharth Saxena · Sunrise, US
• Ben V. Faulkner · Bartlesville, US
• Sachin Satish Idgunji · San Jose, US
• Vinayak Bhargav Srinath · San Jose, US
• Wen Yueh · Yuanli, TW
• Chad Plummer · Bend, US
• Kartik Joshi · Santa Clara, US

Key dates

• Filing date: Jan 30, 2020
• Grant date: Apr 27, 2021
• Expiry date: Jan 30, 2040

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F2119/12
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

Introduced herein is an improved technique of recovering system frequency margin via distributed CPMs. The introduced technique creates and distributes multiple sets of always sensitized critical path replicas across a chip and monitors them for timing failure. The introduced technique takes feedback from these critical path replicas and dynamically boosts the clock frequency of the chip to remove the margin. The introduced technique provides more accurate and more comprehensive coverage of a chip performance.