Array substrate and display device
US10991287B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Mar 1, 2018 |
| Grant date | Apr 27, 2021 |
| Priority date | — |
| Expiry date | Oct 10, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0219
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides an array substrate including at least two groups of gate lines, each group of gate lines including at least one gate line, and at least two gate driving circuits each corresponding to a group of gate lines. For any two gate driving circuits different in distance from the driving chip, any signal output line to which a gate driving circuit farther from the driving chip is connected has a resistance smaller than that of any signal output line to which a gate driving circuit closer to the driving chip is connected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.