Semiconductor device including dummy conductive cells
US10991663B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 13, 2019 |
| Grant date | Apr 27, 2021 |
| Priority date | — |
| Expiry date | Dec 13, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method is disclosed and includes forming a plurality of dummy conductive cells that provides different densities in empty areas in metal layers of a semiconductor device according to overlap conditions of the empty areas each arranged between a pair of neighboring metal layers of metal layers. Forming the plurality of dummy conductive cells includes operations of forming a group of dummy conductive cells in a single empty area of the empty areas when the single empty area in one pair of the neighboring metal layers is overlapped by a signal line in the same pair of the neighboring metal layers. When viewed in plan view, projection areas of the group of dummy conductive cells are vertically overlapped by a projection area of the signal line. A semiconductor device is also disclosed herein.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.