Shift register unit, gate drive circuit and display device
US10997936B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 10, 2019 |
| Grant date | May 4, 2021 |
| Priority date | — |
| Expiry date | Jan 10, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0286
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift register unit, a gate drive circuit and a display device are disclosed. The shift register unit includes an input circuit, an output circuit, a reset circuit, a control circuit and a reset stabilizing circuit. The input circuit is configured to write an input signal into a first node in response to an input start signal. The output circuit is configured to output a preparatory output signal to an output terminal under control of an electric level of the first node. The reset circuit is configured to reset the output terminal under control of an electric level of a second node. The control circuit is configured to apply a first voltage signal to the second node in response to a control signal. The reset stabilizing circuit is configured to apply a second voltage signal to the first node in response to a reset stabilizing signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.