Memory processing units and methods of computing dot products
US10998037B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 24, 2019 |
| Grant date | May 4, 2021 |
| Priority date | — |
| Expiry date | Dec 24, 2039 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory processing unit can be configured to compute partial products between one or more elements of a first matrix stored in a given row of a memory cell array and sequential bits of one or more elements of a second matrix. The partial products can be calculated first sequentially across the set of rows and second sequentially across the bit positions of the elements of the second matrix. Alternatively, the partial products can be calculated first sequentially across the bit positions of the elements of the second matrix first and second sequentially across the set of rows. The partial products for each column of elements can be accumulated and bit shifted to compute the dot product of the first and second matrix.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.